1. Field of the Invention
The invention relates to a method for performing local oxidation of silicon (LOCOS) after a poly or amorphous gate is deposited on a silicon substrate.
2. Description of the Related Art
Fabrication of large scale integration (LSI) and very large scale integration (VLSI) on silicon (Si) substrates requires extreme crystalline perfection of the silicon. Several methods currently exist for obtaining such extreme crystalline perfection, including Czochralski (CZ) crystalline growth and float zone (FZ) growth, described in Silicon Processing for the VLSI Era, Volumes I, II, and III, by S. Wolf and R. N. Tauber (Lattice Press 1986), which is incorporated herein by reference. In the CZ method, single crystal ingots are pulled from molten silicon contained in a crucible. CZ growth involves the crystalline solidification of atoms from a liquid phase at an interface. In the FZ method, a molten zone is passed through a poly-Si rod of approximately the same dimensions as the final ingot. CZ crystals are preferred for VLSI design over FZ crystals, since they can withstand thermal stress better than FZ crystals. However, FZ crystals can obtain higher purity over CZ crystals.
After the ingot is obtained, the finished silicon wafer is achieved by the processes of slicing, etching and polishing the ingot, as described in the Wolf and Tauber reference.
The formation of oxide on silicon, thereby forming SiO.sub.2, or silicon dioxide, is called oxidation. The formation of the oxide layer provides a foundation for planar processing of silicon integrated circuits. The most common way to produce SiO.sub.2 on the silicon surface is by thermal oxidation, in which the silicon is exposed to an oxidizing ambient (O.sub.2, H.sub.2 O) at elevated temperatures. Other techniques used to grow SiO.sub.2 on silicon include plasma anodization and wet anodization.
The use of a SiO.sub.2 layer on silicon is important for LSI and VLSI processing. Some of the functions of this layer include: a) masking against ion implantation, b) passivation of the silicon surface, c) isolation of individual devices (e.g., local oxidation of silicon, or LOCOS), d) use as a gate oxide and capacitor dielectric in MOS devices, and e) use as a tunneling oxide in electrically alterable ROMS (EAROMs).
One of the most important applications of oxidation to LSI and VLSI processing is the formation of a gate-dielectric for MOS transistors. In this situation, the SiO.sub.2 layer is an active device component. Currently, device dimensions are getting smaller and smaller, and for device dimensions that are scaled to one micron or less, oxide layers of 150 angstroms or less are required. Tunnel oxides for use in EAROMs require oxides that are thinner than 100 angstroms. These thin oxide layers must be capable of being manufactured with high yield and with long-term reliability.
Many techniques are available to control the growth of thin oxides on silicon. These include: a) dry oxidation, b) wet oxidation, c) dry or wet oxidation with HCL, trichloroethylene (TCE), or trichloroethane (TCA), d) reduced pressure oxidation, e) low temperature, high pressure oxidation, and f) rapid thermal processing under oxidizing conditions.
LSI and VLSI devices requires gate and tunnel dielectric thicknesses in the range of 100 angstroms or less. Very thin layers of SiO.sub.2 are known to have relatively high defect densities, and do not serve as an effective diffusion mask against impurity diffusion. As a consequence, thermal nitridation of silicon and thin SiO.sub.2 is a viable alternative method of growing a good quality dielectric film that has a very small thickness. Thermally grown films of silicon nitride (Si.sub.3 N.sub.4) have the following advantages over SiO.sub.2 : a) they tend to have self-limiting growth kinetics which makes them easily controllable, and b) they are effective barriers to impurity diffusion.
Thermally grown silicon nitride films are typically grown by a high temperature (950-1200 degrees C.) nitridation of silicon in pure ammonia (NH.sub.3) or an ammonia plasma. Other techniques are also available to grown silicon nitride films, including using direct nitrogen implantation at a high dosage (e.g, 5.times.10.sup.16 cm.sup.-2) and at a high energy range (e.g., 5-60 keV), followed by an anneal at high temperature (1000 degrees C.) in an N.sub.2 ambient.
Various dopants, such as boron, phosphorous, gallium, aluminum, arsenic and antimony, are used to enhance the oxidation rate when present in high concentration in silicon. For diffusion limited oxidations, the oxidation rate of the heavily doped silicon is primarily dependent on the impurity concentration in the SiO.sub.2.
SiO.sub.2 can also be used as a mask against the diffusion of the common dopants in silicon. Devices are typically formed by etching windows in selected areas of the SiO.sub.2 grown on the silicon. Junctions are then formed by diffusing or ion implanting impurities into these selected regions.
Chemical vapor deposited (CVD) SiO.sub.2 films, and their binary and ternary silicates, are widely used in LSI and VLSI processing. These materials are typically used as insulators between polysilicon and metal layers, between metal layers in multilevel metal systems, as getters, as diffusion sources, and as final passivation layers. CVD silicon dioxide is an amorphous structure of SiO.sub.4 tetrahedra with an empirical formula SiO.sub.2. Deposition of CVD SiO.sub.2 at high temperatures can make the properties of CVD films approach those of thermal oxide.
Polycrystalline silicon (also called polysilicon, or poly), in thin film has many important advantages in integrated circuit (IC) technology. Heavily-doped poly films have been widely used as gate electrodes and interconnections in MOS circuits. Poly is utilized in these circuits because of its compatibility with subsequent high temperature processing, its excellent interface with SiO.sub.2, and its high reliability.
Thin films of poly are made up of small (on the order of 100 angstroms), single crystal regions, separated by grain boundaries. The grain boundaries are composed of disordered atoms, and contain large numbers of defects due to incomplete bonding. Inside each grain, atoms are arranged in a periodic structure. At a given dopant concentration, poly exhibits significantly higher resistivity than single crystal silicon. Poly is generally deposited by a thermal decomposition of silane (SiH.sub.4) in a temperature range of 580 to 650 degrees C. The main technique used to deposit poly is by low pressure chemical vapor deposition (LPCVD), because of its uniformity and purity.
Traditionally, local oxidation of silicon (LOCOS) is formed before growing a gate oxide on a silicon substrate. The inventor has determined that is desirable to form the LOCOS after growing the gate oxide on the silicon substrate, in order to provide a more reliable and efficient semiconductor device.